This interface connects one or more Dallas
1820 thermometers
to a BASIC STAMP .
It is designed to connect other "one-wire" devices also,
but this has not yet been tested. The 1820 is a three-pin device.
Two pins are power and ground. The third pin is used for serial
communications using the Dallas "one-wire" protocol.
The thermometers all connect in parallel to this multidrop serial
interface. The 1820 protocol requires some signal timing that
cannot be implemented purely in STAMP software. Therefore, the
interface subsystem includes a one-shot (yuck!), a latch, and
a tri-state buffer. In conjunction with the appropriate software,
this circuit permits the STAMP to run the protocol. The stamp
interfaces to the circuit with two I/O pins.
The 1820 can operate with only two wires instead of three, by
taking power from its signaling lead. Dallas refers to this mode
as "parasite power" mode. To use it, the master must
drive several milliamps at +5VDC into the data line at certain
times during certain operations. The circuit and the software
do not provide this mode of operation, but can easily be adapted
for it. This mode will require three Stamp I/O pins.
The thermometer interface is intended to permit the stamp to control a multidropped "one wire" interface. Each thermometer's serial connection is open-drain. The interface pulls the wire up with a 5k resistor. The stamp and the thermometers communicate by pulling the wire low to send pulses. The stamp is the master. A thermometer sends a pulse only when the stamp tells it to. The protocol calls for the master to send pulses of several different lengths. There is no maximum time between these pulses from the stamp. The length of the pulse is significant, but the stamp hardware and software can send the required pulses. The only hard part is reading the pulses sent from the devices.
The stamp solicits a pulse from a device by sending a series of pulses ending in a "read" pulse. To send back a "1", the device does nothing. To send back a "0", the device begins to pull the line down within one microsecond of receiving the leading edge of the read pulse, and continues to hold the line down for at least 15 microseconds. To read this response properly, the master's read pulse should be as short as possible, (nominally one microsecond), and the master should sample the wire about 14 microseconds after the leading edge of the pulse.
The stamp's pulse timer granularity is 2 microseconds, and there is no obvious way to program an output which signals both the one microsecond interval and the 15 microsecond interval. Thus, an external timer is needed. and we are forced into using a one-shot. Further, although the stamp's I/O pins are tri-statable, they cannot be turned around fast enough for the read. We use a tri-state buffer to solve this problem. Finally, we cannot actually read the input fast enough with the stamp. We solve this problem with a latch. There is probably an elegant single-chip solution to this problem, but this circuit uses a three-chip brute-force approach.
The interface hardware and software cannot send a 1 microsecond
pulse, so it makes do with a 2 microsecond pulse. This cuts into
the "guard time" during which the one-wire is being
pulled up by the pull-up resistor. The "guard time"
is reduced from 13 microseconds to 12 microseconds. However, unless
the one-wire has a large effective capacitance, (for example,
if it's very long) there is no problem with this. It reduces the
maximum cable length by less than ten percent. I have not determined
the maximum cable length, but I guess that it will be on the order
of one hundred feet. Note the Dallas has an application note that
describes the use of a 115kbps serial UART (i.e, a PC UART) to
drive the one-wire interface. In that application, the pulse is
more than 8 microseconds, which cuts the "guard time"
to 6 microseconds or so.
The stamp will use one pin to send the control pulses and another to read the latch. The pin is connected to the inverted control pin of a tri-state driver. The driver's input is grounded and it's output connected to the one-wire. Thus, the stamp's TTL output pulse is converted into a "tri-state" pulse. In addition, the stamp's output pin is connected to the control pin of the one-shot so that the one-shot will change state at the start of the pulse. The one-shot's output pulse width is adjusted to a nominal 14 microseconds by selecting the appropriate values for the timing resistor and capacitor. The one-shot's pulse output is connected to the latch control input of the latch, so the trailing edge of the pulse causes the data to latch. The data input of the latch is connected to the one-wire, and the output of the latch is connected to the stamp input pin. As a result, the latch will capture a sample of the one-wire's state 14 microseconds after the leading edge of each pulse generated by the stamp. The Stamp's software will generate pulse trains. Some of the pulses will be reads, but most will not. The latch doesn't care: it will simply take a sample 14microseconds after the start of each pulse. The software won't bother to read the latch unless the output pulse is a read. If the output pulse is a read, the software will read the latch.
The resistor and capacitor that control the length of the one-shot can in theory be any combination such that the resistance in ohms, times the capacitance in farads, times the time constant of the '123 (1sec/(ohm*farad)) equals the desired output pulse width of 14 microseconds. Since I know very little about hardware design, I don't know whether not the 5.6Kohm times 2700pf is a good choice. As a wild guess, smaller resistance/larger capacitor will draw more power but be more stable, and higher resistance/smaller capacitor will draw less power but be more stable. I simply picked a capacator out of my junk box, then picked a resistor to match, then measured the pulse and adjusted. Since my ancient oscilloscope died and went to the great junk box in the sky, I used the stamp to measure the pulse width.
(Adapted from a schematic supplied by Dave Kitts, who is another STAMP experimenter.)
| 1 | 74HCT125 | quad tristate driver |
| 1 | 74HCT123 | dual monostable flop |
| 1 | 74HCT74 | dual flip-flop |
| 1 | 4.7Kohm resistor | |
| 1 | 5.6Kohm resistor | |
| 1 | 2700pF capacitor |
One quarter of the '125 and half of each of the other two ICs
are used.
| '125 | |
| pin 1 | enable* connect to STAMP hw pin 12 |
| pin 2 | in. ground |
| pin 3 | out. Connect to one-wire, and to a pull-up. |
| Pin 7 | ground. |
| Pin 14 | +5VDC |
| pins 4-6 and 8-13 | NC. |
| '123 | |
| pin 1 | trigger. Connect to STAMP pin 11. |
| Pin 2 | "B" (pull hi) |
| pin 3 | reset. (pull hi) |
| pin 4 | neg out. Connect to '74 pin 3 |
| pin 8 | Ground |
| pin 13 | pos out. (nc) |
| pin 14 | C ext. connect to timing cap. |
| Pin 15 | Cext/Rext. Connect to timing cap and resistor. |
| Pin 16 | +5VDC |
| pins 5,6,7,9,10,11, 12 | unused. |
| '74 | |
| pin 1 | reset*. (pull hi) |
| pin 2 | input. Connect to one-wire |
| pin 3 | clock pulse. Connect to '123 pin 4 |
| pin 4 | set* (pull hi) |
| pin 5 | pos out. Connect to stamp pin 11 |
| pin 6 | neg out. (nc) |
| pin 7 | Ground |
| pins 8-13 | NC |
| pin 14 | +5VDC |
the I/O control for the thermometers can be described as a "multi-level protocol". The lowest protocol level is the pulse level, which sends pulses of various lengths and receives responses. The next level is the byte I/O level, which sends and receives 8-bit bytes. The next level is the "command" level, which sends and receives particular byte strings.
This protocol level presents six "primitives" to the next protocol level: Reset, Write 0, Write 1, Read bit, start CRC, and check CRC. In each case, the hardware latches the one-wire state and makes it available on the input pin, but the higher-layer protocol only uses it when a read response is expected. The pulse level interacts with the one-wire interface by sending PULSOUT commands to the output pin. The pulse level must therefore initialize the pin to HIGH.
The pulse level maintains a running computation of the input CRC in a byte variable.
Many of the higher-level functions of the protocol may be modelled as sending and receiving bytes. The routine to send a byte takes the byte in a variable named "tbyte" and sends it as 8 bits. The routine to receive a byte places 8 bits into "tbyte".
The Dallas protocol specifies a "transaction". A transaction has the following elements:
The reset primitive is used for initialization.
There are five ROM functions in the protocol: read ROM, Match ROM, Skip ROM, Search ROM, and Alarm Search. The code does not implement the Search ROM or the Alarm search, since they are of limited utility and they are very complex. Skip ROM is done by sending a single byte. Read ROM and Match ROM are more complicated.
There are several memory commands. The only one implemented for this application is the "convert T" command. For this command, we send the command byte, then pause for 500 milliseconds.
The 1820 returns a 16-bit temperature value with a granularity of .5 degree centigrade.
It also returns a pair of numbers that represent the fraction of a degree and which can be used to refine the measurement. The coarse temperature is the centigrade temperature in degrees, ignoring the LSB of the 16-bit value.
TEMP=coarse_temp-0.25+(denom-num)/denom, or
TEMP=coarse_temp+.75-num/denom
My application operates in Farenheit and needs higher precision, so I multiply the coarse temp by 180 to get hundredth's of a farenheit degree, then subtract 135 (1.35F =.75 C), then compute the fine-grain adjustment by multiplying the num by 180, dividing by the denom, then subtract fine-grain adjustment from the coarse farenheit. My application then adds 32 prior to displaying the result.
The interface can be adapted to support Dallas 1820's using parasite
power. In this mode, the 1820's power pin is not connected, and
the device draws up to 5ma of power from the signal line during
a "convert" or "ROM WRITE" command. After
the master sends one of these commands, the master must begin
supplying power on the signal line within ten microseconds. The
circuit described above lets the stamp put the signal line in
either of two states: Lo-impedance low voltage, (i.e., active
logic zero), or hi-impedance logic hi (i.e., "tri-stated
and pulled up".) Parasite power requires an additional state:
lo-impedance logic high. As it happens, the tri-state driver can
do this. All that's necessary is to control the input pin of the
tri-state driver. The circuit described above has that pin grounded.
To control the pin, simply disconnect it from ground and connect
it to an unused pin on the stamp. The software described above
will continue to operate normally when this new pin is driven
low by the stamp. To provide parasite power, the "convert"
or "ROM WRITE" command is sent with a different software
routine. This routine starts by setting the new stamp pin to HIGH.
It then sets the old control pin LOW. Now, the circuit is actively
driving the signal wire. Now the new routine sends pulses on the
new pin to send the command. After the last pulse, the signal
line will continue to be driven hi by the tri-state driver, which
will supply enough power to satisfy the 1820. After the master
finishes waiting for completion of the command, it sets the old
signal pin back to hi, and then sets the new signal pin to low,
to revert to normal operation. The remainder of the software is
unaffected.
Updated 12 Feb 96. This is version 3.